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Capacitance Ageing of Ceramic Capacitors, A Tutorial

Explanation of the natural ageing process resulting in logarithmic loss of Capacitance

Introduction
Capacitor ageing (Capacitance Drift) is a term used to describe the negative,logarithmic capacitance change that takes place in ceramic capacitors with time. Theageing process has a negligible affect on Class 1 (C0G) product but should be takeninto account when measuring Class 2 (X7R, Y5V & Z5U) product.

The crystalline structure for Barium Titanate based ceramics changes on passingthrough its Curie temperature (known as the Curie Point) at approximately 125oC.The domain structure relaxes with time and in doing so, the dielectric constantreduces logarithmically, this is known as the ageing mechanism of the dielectricconstant. The more stable dielectrics have the lowest ageing rates.

The start point for the ageing process is indicated for all product supplied by Syfer bythe date stated on the packaging labels. If the ageing start point is not known then theageing process can be reset by heating the capacitors to a temperature above the CuriePoint. The ageing process then starts again from zero.

Law of Capacitance Ageing
During the first hour after cooling through the Curie temperature, the loss ofcapacitance is not well defined, but after this time it follows a logarithmic law that canbe expressed in terms of an ageing constant.

The ageing constant 'k', or ageing rate, is defined as the percentage loss of capacitancedue to the ageing process of the dielectric that occurs during a decade of time (atenfold increase in age) and is expressed as percent per logarithmic decade of hours.As the law of decrease of capacitance is logarithmic, this means that in a capacitorwith an ageing rate of 1% per decade of time, the capacitance will decrease at a rateof:

i) 1% between 1 and 10 hours
ii) an additional 1% between the following 10 and 100 hours
iii) an additional 1% between the following 100 and 1,000 hours
iv) an additional 1% between the following 1,000 and 10,000 hours etc.

The ageing rate continues in this manner throughout the capacitors life.

An alternative method of expressing this is that the percentage loss of capacitance willbe 2 times 'k' between 1 and 100 hours and 3 times 'k' between 1 and 1,000 hours. Thismay be expressed mathematically by the following equation:


The ageing constant may be declared by the manufacturer for a particular ceramicdielectric, or it may be determined by de-ageing the capacitor and measuring thecapacitance at two known times thereafter.

Typical values of the ageing constant for Syfer Technology ceramic capacitors are:

Example of a different dielectric material/ type offered by other capacitormanufacturers:

 

Capacitance Measurements

Ageing Allowances
Because of ageing, it is necessary to specify an age for reference measurements atwhich the capacitance shall be within the prescribed tolerance. This is fixed at1,000 hours, since for practical purposes there is not much further loss ofcapacitance after this time.

In order to calculate the capacitance C1000 after 1,000 hours the following formula
may be used:

For measurements during the course of capacitor manufacture, the loss ofcapacitance from the time of measurement to the 1,000 hour age will be knownand can be off-set by using asymmetric inspection tolerances. For example, if it isknown that the total capacitance loss to 1,000 hours will be 5%, then thecapacitors may be inspected to limits of say -15%/+25% instead of ± 20%.

All capacitors shipped are within their specified tolerance at the standard reference age of 1,000 hours after cooling through their Curie temperature.

Ageing begins after cooling from above the Curie point and continues, apparentlyforever. This capacitance loss does not limit the effective life of the capacitor,however, it should not be overlooked. A 1% change of capacitance value between1 and 10 hours may seem serious but 1% change between 10,000 and 100,000hours is less significant.

Refer to Appendix 1 showing the tolerance correction (for standard reference ageof 1,000 hours) to allow for ageing rates of 1% and 6% between 12 and 10,000hours.

Ageing Allowance Example
A capacitor with a tolerance of ± 20% is measured after 3750 hours from its lastheat cycle. The corrected tolerance limits to which it should be tested are:

Test Temperature
Capacitance is normally declared at a reference temperature, this varies accordingto specification dependent on country of origin, for example CECC specifies 20°C± 2°C.

Capacitors measured at Syfer are tested in accordance with CECC specificationsat 20°C. If capacitors are tested at a different temperature then allowances shouldbe made when verifying the capacitance value.

Care should be taken when testing capacitors. Errors can arise if capacitors areheated by body heat through handling and it is recommended that for precisionmeasurement plastic tweezers be used to handle capacitors.


Test Frequency and Voltage

The following table details the frequency and voltage settings used for electricaltesting of surface mount and radial product types by dielectric classification.


Measuring Equipment and Measurement Uncertainties
Incorrect capacitance measurement can also be introduced as a result of either theaccuracy of the equipment and/ or measurement uncertainties.

Measuring equipment. The accuracy and precision of the measuring device/meter should be examined to determine if the meter is capable of measuringthe capacitor adequately.

Measurement uncertainties. Errors should be removed before measuring thecapacitors. For example, by performing open and short-circuit compensations.

Low capacitance measurements can be affected by stray capacitance fromequipment test leads. It is recommended that when measuring values less than50pF test fixtures are used to minimise the possibility of stray capacitance.
As a result of the piezoelectric nature of ceramic capacitors, tweezer pressurecan also affect capacitance measurements.

Low capacitance radial products can also be affected by stray capacitancefrom the components legs/ leads. It is recommended that radial products aremeasured across the leads directly next to the component body.

Resetting the Ageing Process
For Class 1 (C0G) ceramics the ageing rate is negligible. For Class 2 ceramics it maybe necessary to reset the ageing process.

The ageing process is reset by heating the dielectric above its Curie Point. To ensurethat all capacitors have been sufficiently heated and that the ageing process has beenreset it recommended that capacitors are placed in an oven @ 160°C for 11/2 hoursseparated on a metal tray. After the heating process, the capacitors should then beallowed to stabilise at room temperature (20°C ± 2°C) for 24 hours before capacitancemeasurements are conducted.

Capacitance Tolerance & Circuit Application
Capacitance ageing is inherent in class 2 ceramic capacitors and it is important forcircuit designs to recognise and allow for this effect. It is of particular importancewhen initial capacitance tolerance must be tight. In these circumstances the ageingrate may cause the capacitors to drift out of tolerance on the low side. For example, itwould be imprudent to specify a 5% tolerance for a unit with a 2% ageing rate.Designing the capacitor with an initial value large enough to compensate for longterm ageing will cause the units to be out of tolerance on the high side each time deageingoccurs. This can be especially true for equipment where an ambient operatingtemperature of +125oC could cause potential de-ageing. For this reason tight tolerancecapacitors should be of class 1 dielectric when possible.

Summary & Conclusions

  1. Electrical Tests. The recommended sequence for testing Multilayer Ceramic
    Capacitors is:
    1. Insulation Resistance (IR)
    2. Voltage Proof (VP)/ Dielectric Withstand Voltage (DWV)
    3. De-age Class 2 capacitors and allow to stabilise at room temperaturefor 24 hours before capacitance measurements are conducted.
    4. Capacitance, apply factors based on the manufacturers ageing rate andthe time elapsed since the last Curie temperature excursion.
    5. Dissipation Factor.
    6. Other Tests. If any limits are specified for change in capacitanceduring a long term test, the capacitor should be de-aged before both theinitial and final measurements.
  2. With surface mount MLC's some of the solder termination materials used willdiffusion bond at temperatures close to that of the ceramic Curie temperature.It is, therefore, important that when de-ageing these products they should beplaced on a tray such that their termination end surfaces are not in contact witheach other.
  3. The ageing process is completely repeatable and predictable for a givencapacitor.
  4. Capacitance change is negative and logarithmic in respect to time.
  5. Application of a D.C. bias can move the point on the ageing curve forward intime. When a D.C. voltage is applied at elevated temperatures (below theCurie Point) the capacitor will show a loss of capacitance but with aconsequently lower ageing rate.
  6. Class 1 CG/1B (C0G) dielectric has a negligible ageing rate.
  7. Class 2 ceramic dielectrics have ageing rates which may vary from 0.6% to 8%. Dependent upon particular ceramic composition employed, this widecapacitance change, as a result of 'Shelf' ageing and temperature cycling,illustrates why tight-tolerance (less than ± 5%) high dielectric constantceramics should only be specified with caution.
  8. Soldering both leaded and surface mount class 2 capacitors into a circuit will,because of the ageing phenomenon, give an increase in capacitance as a resultof the soldering temperature being greater than the dielectric Curie Point. Themagnitude of the change will be dependent on the soldering temperature, timeand the dielectric class.

Appendix 1 Tolerance Correction For Ageing Rates Of 1% and 6%
For Standard Reference Age Of 1,000 Hours